Dr. Surya Teja Naga Srinivas Padala
email : suryateja@nitt.edu
Research Interests
- Computational Nanoelectronics
- Reliability Analysis of Nano electronic device using characterization
- TCAD-Augmented Machine Learning
- FPGA Architectures
Professional Experience
| Designation | Institute | Timeline |
|---|---|---|
| Assistant Professor | National Institute of Technology Tiruchirappalli (NIT Trichy), Tamilnadu | 12/2025 - Present |
| Assistant Professor | VIT Vellore | 08/2023 - 12/2025 |
| Assistant Professor | Vignan Institute of Information Technology, Vizag | 06/2015 - 12/2017 |
Education
| Degree | Institute Studied | Department | Year |
|---|---|---|---|
| Ph.D. | Indian Institute of Technology Patna (IIT Patna) | Electrical Engineering | 2018 – 2023 |
| M.Tech. | National Institute of Technology Durgapur (NIT Durgapur) | Microelectronics & VLSI, Electronics and Communication Engineering | 2012 – 2014 |
| B.Tech. | Affiliated to Jawaharlal Nehru Technological University Kakinada (JNTUK) | Electronics and Communication Engineering | 2008 – 2012 |
Courses taught at Postgraduate and Undergraduate levels
- ECPC23 - VLSI SYSTEMS (Jan 2026)
- EC660 - ASIC-CAD LABORATORY (Jan 2026)
Professional Society Membership
- IEEE Member (Member No: 96181355)
Publications
(A) Refereed Research Journals
| S. No. | Author(s) | Title of Paper | Journal | Year |
|---|---|---|---|---|
| 20 | Parasa Sivadurgarao,Arun Kumar, B.V. Rao, Himanshu Karan, Ashraf Maniyar, P.S.T.N. Srinivas | Investigation of dual-metal/dielectric with III–V heterojunction extended-source gate-all-around vertical TFET for enhanced electrical performance | Micro and Nanostructures | 2026 |
| 19 | A. Maniyar, S. Das, P.S.T.N. Srinivas, P. K. Tiwari | Geometry-Driven Thermal Noise Trends in GAA Nanowire Devices | Silicon | 2026 |
| 18 | B. V. Rao, A. Kumar, P.S.T.N. Srinivas, B. Bhowmick | Dielectric Modulation-Based High-Sensitivity Biomolecular Detection Using Ge/Si Heterostructure ES Fin-TFET Biosensors: A Detailed Performance Study | Sensing and Imaging | 2026 |
| 17 | R. Raj, S. Moparthi, A. Kumar, P. K. Tiwari, P.S.T.N. Srinivas | Computational investigation of trapezoidal channel profiles in Gate-All-Around (GAA) FETs for digital performance | Micro and Nanostructures | 2025 |
| 16 | S. Kumar, A. Kumar, P.S.T.N. Srinivas | Investigation of BTBT-Triggered Split-Gate Junctionless Nanosheet FETs for Analog and RF Applications | Transactions on Electrical and Electronic Materials | 2025 |
| 15 | A. Maniyar, P. Raj, P.S.T.N. Srinivas, A. Kumar, K. S. Chang-Liao, P. K. Tiwari | Impact of Process-Induced Inclined Side-Walls on Gate Leakage Current of Nanowire GAA MOSFETs | IEEE Transactions on Electron Devices | 2024 |
| 14 | T. S. Kumar, A. Hazarika, P.S.T.N. Srinivas, P. K. Tiwari, A. Kumar | A machine learning approach to accelerate reliability prediction in nanowire FETs from self-heating perspective | Microelectronics Reliability | 2024 |
| 13 | P.S.T.N. Srinivas, N. A. Kumari, A. Kumar, P. K. Tiwari, K. G. Sravani | Impact of ambient temperature on CombFET for sub-5-nm technology nodes: An RF performance perspective | Microsystem Technologies | 2024 |
| 12 | S. S. Katta, T. Kumari, P.S.T.N. Srinivas, P. K. Tiwari | Logic-in-memory application of silicon nanotube-based FBFET with core-source architecture | Microelectronics Journal | 2024 |
| 11 | P.S.T.N. Srinivas, S. Jit, P. K. Tiwari | Impact of self-heating on thermal noise in In1−xGaxAs GAA MOSFETs | Microelectronics Journal | 2023 |
| 10 | A. Maniyar, P.S.T.N. Srinivas, P. K. Tiwari, K. S. Chang-Liao | Impact of process-induced inclined sidewalls on gate-induced drain leakage (GIDL) current of nanowire GAA MOSFETs | IEEE Transactions on Electron Devices | 2022 |
| 9 | S. Singh, P.S.T.N. Srinivas, A. Kumar, P. K. Tiwari | Physical insight into self-heating induced performance degradation in RingFET | Silicon | 2022 |
| 8 | P.S.T.N. Srinivas, A. Kumar, P. K. Tiwari | Effect of self-heating on small-signal parameters of In0.53Ga0.47As based gate-all-around MOSFETs | Semiconductor Science and Technology | 2021 |
| 7 | P.S.T.N. Srinivas, P. K. Tiwari | Impact of Self-Heating on Linearity Performance of In0.53Ga0.47As-Based Gate-All-Around MOSFETs | IEEE Transactions on Device and Materials Reliability | 2021 |
| 6 | V. K. Dixit, R. Gupta, P.S.T.N. Srinivas, S. Dubey | Back Bias Induced Modeling of Subthreshold Characteristics of SOI Junctionless Field Effect Transistor (JLFET) | Silicon | 2021 |
| 5 | P.S.T.N. Srinivas, A. Kumar, P. K. Tiwari | Threshold Voltage Modeling of tri-Gate Schottky-Barrier (TGSB) Field-Effect-Transistors (FETs) | Silicon | 2021 |
| 4 | V. K. Dixit, R. Gupta, V. Purwar, P.S.T.N. Srinivas | Effect of Substrate Induced Surface Potential (SISP) on Threshold Voltage of SOI Junction-Less Field Effect Transistor (JLFET) | Silicon | 2021 |
| 3 | D. Gola, B. Singh, P.S.T.N. Srinivas, P. K. Tiwari | Thermal noise models for trigate junctionless transistors including substrate bias effects | IEEE Transactions on Electron Devices | 2020 |
| 2 | P.S.T.N. Srinivas, A. Kumar, S. Jit, P. K. Tiwari | Self-heating effects and hot carrier degradation in In0.53Ga0.47As gate-all-around MOSFETs | Semiconductor Science and Technology | 2020 |
| 1 | A. Kumar, P.S.T.N. Srinivas, P. K. Tiwari | An insight into self-heating effects and its implications on hot carrier degradation for silicon-nanotube-based double gate-all-around (DGAA) MOSFETs | IEEE Journal of the Electron Devices Society | 2019 |
(B) Conferences/Workshops/Symposia Proceedings
| S. No. | Author(s) | Title of Abstract/ Paper | Title of the Proceedings | Year | DOI / Link |
|---|---|---|---|---|---|
| 11 | Annie Catherine J, Deekschika R, Mithika Munibabu, Arun Kumar, Rajeev Pankaj Nelapati, P.S.T.N. Srinivas | Investigation of RF Performance in n-JL-CombFET | 2026 9th International Conference on Electronics, Materials Engineering & Nano-Technology (IEMENTech) | 2026 | 11434316 |
| 10 | Rohan Raj, Mathew John, Sheik Afrath, S Satheesh Kumar, P.S.T.N. Srinivas, S Ravi | FPGA Based Design for Efficient Functioning of Fully Automatic Washing Machine | 2025 IEEE 6th India Council International Subsections Conference (INDISCON) | 2025 | 11252039 |
| 9 | A. Maniyar, P.S.T.N. Srinivas, P. K. Tiwari | Impact of Process-Induced Inclined Sidewalls On Small Signal Parameters of Silicon Nanowire GAA MOSFET | TENCON 2023 - 2023 IEEE Region 10 Conference (TENCON) | 2023 | 10322347 |
| 8 | P.S.T.N. Srinivas, A. Kumar, P. K. Tiwari | In0.53Ga0.47As Nanosheet MOSFETs with Self-Heating Effects | 2022 IEEE Silchar Subsection Conference (SILCON) | 2022 | 10028932 |
| 7 | A. Kumar, P.S.T.N. Srinivas, P. K. Tiwari | Analytical Modeling of Subthreshold Current and Subthreshold Swing of Schottky-Barrier Source/Drain Double Gate-All-Around (DGAA) MOSFETs | 2019 IEEE International Symposium on Smart Electronic Systems (iSES) | 2019 | 9002480 |
| 6 | A. Kumar, P.S.T.N. Srinivas, P. K. Tiwari | Compact drain current model of silicon-nanotube based double gate-all-around (DGAA) MOSFETs incorporating short channel effects | 2019 IEEE 14th Nanotechnology Materials and Devices Conference (NMDC) | 2019 | 9084000 |
| 5 | P.S.T.N. Srinivas, A. Kumar, P. K. Tiwari | Effects of Lateral Spreading in 2-Dimensional Non-Uniform Doped Junctionless FinFETs | 2019 IEEE 9th International Nanoelectronics Conferences (INEC) | 2019 | 8853855 |
| 4 | A. Kumar, P.S.T.N. Srinivas, P. K. Tiwari | Physical insight into self-heating effects in ultrathin junctionless gate-all-around FETs | 2019 IEEE 9th International Nanoelectronics Conferences (INEC) | 2019 | 8853852 |
| 3 | A. Kumar, P.S.T.N. Srinivas, P. K. Tiwari | Analytical Threshold Voltage Model of Schottky-source/drain (Schottky-S/D) double gate-all-around (DGAA) Field-Effect-Transistors (FETs) | 2019 Devices for Integrated Circuit (DevIC) | 2019 | 8783617 |
| 2 | P.S.T.N. Srinivas, V. K. Pulluri, C. Kumar, A. K. Mal | Implementation of 32 nm FinFET voltage controlled oscillator | International Conference for Convergence for Technology-2014 | 2014 | 7092337 |
| 1 | P. Dhilleswararao, R. Mahapatra, P.S.T.N. Srinivas | High SNM 32nm CNFET based 6T SRAM Cell design considering transistor ratio | 2014 International Conference on Electronics and Communication Systems (ICECS) | 2014 | 6892748 |
Contact Address
Dr. Surya Teja Naga Srinivas Padala
Assistant Professor
Room No. 315
Department of Electronics and Communication Engineering,
NIT Tiruchirappalli - 620015
Email: suryateja@nitt.edu