- Departments / Centres
Unit – I
Binary codes - Weighted and non-weighted - Binary arithmetic conversion algorithms, Canonicaland standard boolean expressions - Truth tables, K-map reduction - Don't care conditions - Adders / Subtractors - Carry look-ahead adder - Code conversion algorithms - Design of code converters - Equivalence functions.
Unit – II
Binary/Decimal Parallel Adder/Subtractor for signed numbers - Magnitude comparator - Decoders / Encoders - Multiplexers / Demultiplexers - Boolean function implementation using multiplexers.
Unit – III
Sequential logic - Basic latch - Flip-flops (SR, D, JK, T and Master-Slave) - Triggering of flip-flops - Counters - Design procedure - Ripple counters - BCD and Binary - Synchronous counters, Registers - Shift registers - Registers with parallel load, Reduction of state and flow tables - Race-free state assignment - Hazards.
Unit – IV
Introduction to VLSI design - Basic gate design - Digital VLSI design - Design of general boolean circuits using CMOS gates. Verilog Concepts – Basic concepts – Modules & ports & Functions – useful modeling techniques –Timing and delays–user defined primitives. Modeling Techniques
Unit – V
Advanced Verilog Concepts – Synthesis concepts –Inferring latches and flip-flops–Modeling techniques for efficient circuit design. Design of high-speed arithmetic circuits–Parallelism Pipelined Wallace tree tipliers - Systolic algorithms - Systolic matrix multiplication.