Publications

Papers in International Journals

  • Satyanarayana Vollala, and N. Ramasubramanian, "Energy efficient modular exponentiation for public-key cryptography based on bit forwarding techniques." Information Processing Letters (Elsevier), Volume 119, pp. 25-38, 2017.

  • Satyanarayana Vollala, K. Geetha and N. Ramasubramanian, “Modular Exponential Algorithms compatible to Hardware Implementation of Public-Key Cryptography”. Security and Communications Networks (Wiley), Volume 9, Issue 16, pp. 3105-3115, 2016.

  • Satyanarayana Vollala and N. Ramasubramanian, “Bit Forwarding 3-bits Technique for Efficient Modular Exponentiation”, Cyber Security and Privacy in Communication Networks (Thomson Routers), Volume 11, Issue 2, article 2, 2016.

  • Amit K Singh, K. Geetha, Satyanarayana Vollala and N. Ramasubramanian, “Efficient Utilization of shared caches in Multi-core Architectures”, Arabian Journal of Science and Engineering (Springer), Volume 41, Issue 12, pp 5169–5179, 2016.

  • Shameedha Begum, T Vidya, Amit D. Joshi and N Ramasubramanian, “A reconfigurable Cache Design for Embedded Dynamic data cache”, International Journal of Control Theory and Applications, Volume 9(17), pp. 8509-8517, 2016.

  • Jobin Jose and N Ramasubramanian, ”A survey on Last Level Cache Partitioning techniques in Chip Multi-Processors”, International Journal of Control Theory and Applications, Volume 09, pp. 453-461, 2016.

  • V. L. K. Bharadwaj Manda, Voona Kushal, N. Ramasubramanian, “An Elegant Home Automation System using GSM and ARM based architecture”, IEEE Potential, IEEE Student Journals, 2015.

  • N. Ramasubramanian, Hathiram Banoth and P. S. Tamizharshan, “Evaluation of Cache Memory Parameters with Different Instruction Set Architectures”, International Journal of Computational Engineering & Management, Vol. 16 Issue 3, pp. 29­-36, May 2013.

  • N. Ramasubramanian, Ashutosh, Akhilesh Kumar Verma, Manvendra Singh and Praveen Kumar Yadav, “Improving Performance of Real Time Scheduling Policies for Multicore Architecture”, International Journal of Computational Engineering & Management, Vol.16 Issue 3, pp.64­-68, May 2013.

  • N. Ramasubramanian, Srinivas V. V. and Praveen Kumar Yadav, “Performance Evaluation of Stream Log Collection Using HADOOP Distributed File System”, International Journal of Advanced Research in Computer Science and Software, Volume 3, Issue 6, pp. 41­-44, June 2013

  • N.Ramasubramanian, Srinivas V.V and Chaitanya V., “Studies on performance aspects of scheduling algorithms on multicore platforms”, International Journal of Advanced Research in Computer Science and Software Engineering, vol. 2, no. 2, 2012.

  • N.Ramasubramanian, Srinivas V.V and N.A. Gounden, “Performance of Cache memory subsystems for multicore architectures”, International Journal of Computer Science, Engineering and Applications, vol. 1, no. 5, pp. 59­-71, 2011.

  • N.Ramasubramanian, "Modelling Semantic Interdependent Structures using modified Extended Back propagation Neural Networks", International Journal of Management and Systems, Aug 1995.

Papers in International Conferences

  • Satyanarayana Vollala, Shameedha Begum, Amit D. Joshi and N. Ramasubramanian, “High-Radix Modular Exponentiation for Hardware Implementation of Public-Key Cryptography”, IEEE International Conference on Computing, Analytics and Security Trends (CAST-2016), Pune, India, pp. 346-350, December-2016. (Awarded Best Paper)

  • Shameeda Begum, Arun Krishnakumar, Amit D. Joshi and N. Ramasubramanian, “Design of a Reconfigurable Embedded Data Cache", IEEE International Conference on Computing, Analytics and Security Trends (CAST-2016), Pune, India, pp. 318-322, December-2016.

  • Raghunathan M J, Arjun V B, Kaushik K S and N. Ramasubramanian, “A Novel Scheduling Algorithm for Phase Change Memory based Main Memory System with Multiple Ranks”, IEEE International Conference on Microelectronics, Computing and Communications (MicroCom), 2016, Delhi, India, pp. 1-6, 2016.

  • Joshi, A. D., Vollala Satyanarayana., Begum, B. S., & Ramasubramanian N, “Performance Analysis of Cache Coherence Protocols for Multi-core Architectures: A System Attribute Perspective” ACM International Conference on Advances in Information Communication Technology & Computing, Bikanir, India, Article No. 22, August–2016.

  • Anand Prem kumar and N. Ramasubramanian, “Rule Set Optimization for Packet Pre-processing using Hash based Algorithm”, IEEE International Conference on Microelectronics Computing and Communication Organized by the Department of Electronics & Communication Engineering, Durgapur, India, pp. 1-5, 2016.

  • Anand prem kumar, and N. Ramasubramanian, “Pre-processing Algorithm for Rule set optimization throughout Packet classification in network systems”, International Conference on Information and Communication Technology for Sustainable Development (Springer), Goa, India, pp. June – 2016.

  • Kokila, J., N. Ramasubramanian, and S. Indrajeet, “A Survey of Hardware and Software Co-design Issues for System on Chip Design”, International Conference on Advanced Computing and Communication Technologies(Springer), Panipat, india, pp. 41-49, 2016.

  • Priya, B. Krishna, Amit D. Joshi, and N. Ramasubramanian, “A Survey on Performance of On-Chip Cache for Multi-core Architectures”, ACM International Conference on Informatics and Analytics, Pondicherry, India, pp. 35-40, August – 2016.

  • Praveen Kumar Yadav, and N. Ramasubramanian, “Efficient Resource Utilization in Mobile Devices Using Bayesian Framework Based Saliency Mapping”, DRDO Bilingual International Conference, Information Technology : Yesterday, Today, and Tomorrow, Delhi, India, pp. December-2015.

  • Anand Prem Kumar, Vidya Thiyagarajan and  N. Ramasubramanian, “A Survey of Packet Classification Tools and Techniques”, IEEE First International Conference on Computing, Communication, Control And Automation , Maharashtra, India, pp. 103-107, February – 2015.

  • Sangeetha, R. and N. Ramasubramanian, “A survey of hardware signature implementations in multi-core systems”, IEEE 3rd International Conference on Signal Processing, Communication and Networking (ICSCN), Chennai, India, pp. 1-5, March – 2015.

  • Vidya, T. and N. Ramasubramanian, “Design of an interconnect topology for multi-cores and scale-out workloads”, IEEE 3rd International Conference on Signal Processing, Communication and Networking (ICSCN), 2015, Chennai, India, March – 2015, pp. (Awarded Best Paper)

  • Satyanarayana Vollala, B. Shameedha Begum, and N. Ramasubramanian, “Hardware design for multiplicative modular inverse based on table look up technique”, IEEE International Conference on Computing and Network Communications (CoCoNet) Trivandrum, India, pp. 520-523, March – 2015.

  • Begum, B. Shameedha, and N. Ramasubramanian, “A comparative study of cache performance for embedded applications” IEEE International Conference on Computing and Network Communications (CoCoNet), Trivandrum, India, pp. 872-876, March - 2015.

  • Joshi, Amit D. and N. Ramasubramanian, “Comparison of significant issues in multicore cache coherence”, IEEE International Conference on Computing and Internet of Things (ICGCIoT), Delhi, India, pp. 108-112, 2015.

  • Satyanarayana Vollala, Varadhan, V. V., Geetha, K., & Ramasubramanian, “Efficient modular multiplication algorithms for public key cryptography”, IEEE Advance Computing Conference (IACC), Gurgaon, India, pp. 74-76, Feb – 2014.

  • Yadav, P. K., and Ramasubramanian, N, “Power consumption of Android device using different video codecs: An analysis” IEEE Advance Computing Conference (IACC), Gurgaon, India, pp. 1019 – 1022, Feb – 2014.

  • Tamizharasan, P. S., Praveen Kumar Yadav, N. Ramasubramanian, and K. Geetha, “Performance enhancing factors for manycore architectures: State-of-the-art”, IEEE International Conference on Networks & Soft Computing (ICNSC), Guntur, India, pp. 278-283, Aug. 2014.

  • B. C. Manjith , Praveen Kumar Yadav, R. Sangeetha and N. Ramasubramanian, “A Survey of Hardware – Software Security Architectures to Cloud Server”, International Conference on Computer Communication Networks (ICCN 2014), Bangalore, India, pp. 240-247, July-2014.

  • Satyanarayana Vollala, Praveen Kumar Yadav, K.Geetha, N.Ramasubramanian, “A Comparative Study on Enhancements Made for RSA Implementation from Hardware Perspective”, 4th International Joint Conference on Advances in Engineering and Technology, NCR-Delhi, pp. 169-174, December – 2013.

  • N. Ramasubramanian, Praveen Kumar Yadav and K.Geetha, “Different Ways of Exploiting User Satisfaction for Quantifying Performance of Embedded System Application “, International Conference on CNC&CSEE, AIM&CCPE, CSA&SPC-2013, Bangalore, India, pp. 447-452, April - 2013.

  • N. Ramasubramanian and Varadhan V.V. “Estimation of optimum parameters for obtaining enhanced QoS in a virtualized server consolidated cloud environment”, International Conference on CNC&CSEE, AIM&CCPE, CSA&SPC-2013, Bangalore, India, pp. 466-471, April – 2013.

  • Srinivas V.V and N.Ramasubramanian. “Understanding the performance of multi-core platforms”, International Conference on Computer Networks and Information Technology, LNCS-CCIS-142, Bangalore, India, pp. 22-26, March-2011.

  • N.Ramasubramanian, Srinivas V.V and P.Pavan Kumar, “Understanding the impact of cache performance on multi-core architectures”, International Conference on Information Technology and Mobile Communications, LNCS-CCIS-147,  Nagpur, Maharashtra, India, pp. 403-406, April – 2011.

  • Karthik K.S, Shyam.S, Ramasubramanian.N, Shoaib.M, Noor.M and Kamakoti.V, “A SEU Tolerant Distributed CLB RAM for In-Circuit Reconfiguration”, IEEE International conference on VLSI Design and Test Symposium (VDAT'08), Bangalore, India, pp. 228-238, July-2008.

  • N.Ramasubramanian, P.Krishnan and V.Kamakoti, “Studies on the performance on two new bus arbitration schemes for multi-core processors”, IEEE International conference on Advance Computing, Patiala, India, pp. 1192-1196, March- 2009.

Book Chapters

  • P.S. Tamizhrasan, M. Karthikeyan, Amit D. Joshi and N. Ramasubramanian, “Performance Enhancement of Phoneme Recognition using GPUs”, Advances in Intelligent Systems and Research, Atlantis Press-2016.

  • Praveen Yadav P.S. Tamizharasan, Amit D. Joshi and N. Ramasubramanian, “Saliency Aware Resource Saving in Hand-Held Devices”, Advances in Intelligent Systems and Research, Atlantis Press-2016.

  • N. Ramasubramanian and T. Vidya, “NoC Design for interconnecting Multi-cores”, CMOS Digital VLSI Design with Verilog, Springer – 2015.