Design of ASICs    3-0-0-3


  • To prepare the student to be an entry-level industrial standard ASIC or FPGA designer.
  • To  give  the  student  an  understanding  of  issues  and  tools  related  to  ASIC/FPGA  design  and implementation.
  • To give the student an understanding of basics of System on Chip and Platform based design.



Types of ASICs, VLSI Design flow, Programmable ASICs - Antifuse, SRAM, EPROM, EEPROM based ASICs. Programmable ASIC logic cells and I/O cells. Programmable interconnects. Latest Version - FPGAs and CPLDs and Soft-core processors.

Trade off issues at System Level: Optimization with regard to speed, area and power, asynchronous and low power system design. ASIC physical design issues, System Partitioning, Power Dissipation, Partitioning Methods.

ASIC floor planning, Placement and Routing.

System-On-Chip Design - SoC Design Flow, Platform-based and IP based SoC Designs,  Basic Concepts of Bus-Based Communication Architectures,   On-Chip Communication Architecture Standards, Low-Power SoC Design

High performance algorithms for ASICS/ SoCs as case studies – Canonic Signed Digit Arithmetic, KCM, Distributed Arithmetic, High performance digital filters for sigma-delta ADC, USB controllers, OMAP.


Text Book

1.   M.J.S. Smith,“Application Specific Integrated Circuits”, Pearson, 2003


Reference Books

1.   H.Gerez, “Algorithms for VLSI Design Automation”, John Wiley, 1999

2.   J..M.Rabaey,  A.  Chandrakasan,  and  B.Nikolic,  ”Digital  Integrated  Circuit  Design  Perspective (2/e)”, PHI 2003

3.   D. A.Hodges, “Analysis and Design of Digital Integrated Circuits (3/e)”, MGH 2004

4.   Hoi-Jun Yoo,   Kangmin Leeand  Jun  Kyong Kim,  “Low-Power  NoC  for  High-Performance  SoC Design”, CRC Press, 2008

5.   S.Pasricha  and  N.Dutt,”  On-Chip  Communication  Architectures  System  on  Chip  Interconnect, Elsveir”, 2008



Students are able to

CO1: demonstrate VLSI tool-flow and appreciate FPGA architecture.

CO2: understand the issues involved in ASIC design, including technology choice, design management, tool-flow, verification, debug and test, as well as the impact of technology scaling on ASIC design.

CO3: understand the algorithms used for ASIC construction

CO4: understand the basics of System on Chip, On chip communication architectures like AMBA,AXI and utilizing Platform based design.

        CO5: appreciate high performance algorithms available for ASICs