Student Projects

Real time implementation of G726 algorithm in C5402 DSP.

Karthik.S, Manikandan.G, Raja Ranjith, Rajavelu.T, Ramesh.M, Vijaykumar.B
under the guidance of Dr. B. Venkatramani at NIT, Trichy

The project aims at the real time implementation of G.726 algorithm in Texas Instruments TMS320C5402 digital signal processor in assembly language. G726 algorithm is basically an Adaptive Differential Pulse Code Modulation (ADPCM) speech coder. It can be used to compress and reconstruct speech signal with very little perceptual loss of speech quality. The algorithm also has added complexity to handle non-speech signals such as modem signals. This speech coder consists of two major blocks namely encoder and decoder.

The real time speech signal is given as input to the CODEC (8kHz sampling rate) which outputs 16-bit uniform PCM data. This PCM signal is given as input to the encoder routine.

In the encoder part, a difference signal is obtained, by subtracting an estimate of the input signal from the input signal itself. An adaptive quantizer is used to assign 2(or 3 or 4 or 5) binary digits to the value of the difference signal for transmission to the decoder. An inverse quantizer produces a quantized difference signal from these same 2(or 3 or 4 or 5) binary digits. The signal estimate is added to this quantized difference signal to produce the reconstructed version of the input signal. Both the reconstructed signal and the quantized difference signal are operated upon by an adaptive predictor, which produces the estimate of the input signal, thereby completing the feedback loop.

The decoder includes a structure identical to the feedback portion of the encoder. The decoder routine reconstructs the 16-bit uniform PCM from the received 2 (or 3 or 4 or 5) bit encoded data. This reconstructed signal is given to the CODEC, which reproduces the speech signal.

Design of digital IC tester.

VP Karthik, Vadivel Murugan, Senthil S at The ECE Dept, NIT, Trichy

The IC-tester tests the basic logic gates used in the digital laboratory of colleges. It uses 8085 as the controlling and processing unit. The keyboard and the display circuits are interfaced with 8085 through 8255, a universal PPI. Decoders are used to select the individual memory chips. The IC to be tested is considered as a memory mapped i/o device. The input is given to the corresponding pins using their addresses. The output is taken from the relevant pin. It is compared with the look-up table of that IC being stored in the memory. Depending on the result of comparison, the output is displayed in the two seven-segment LED display.

The interfacing device used between processor and test chip is the bi-directional latch. It is connected between each data bus and a pin of test chip.

The forward data flow (processor to chip) is through a latch and a tri state buffer. The backward data flow (chip to processor) is through a tri state buffer. Using this logic inputs are given and outputs are verified.

The output value received via bi -directional latch is compared using look up table of the respective IC. The look up table consists of all possible combinations of inputs and ouputs.

FPGA based generation of high frequency P4 coded carrier for pulse compression radars using CORDIC algorithm.

Rajavelu.T, Ramesh.M under the guidance of Dr. B. Venkatramani at NIT, Trichy

Pulse radars have twin objectives:maximise SNR and maximise accuracy. To maximise SNR, we have to maximise the transmit pulse width whereas to maximise accuracy we have to minimise pulse width. It is obvious that these objectives are conflicting.

Pulse compression radars try to achieve both these aims.In these,the transmit pulse is divided into smaller subpulses.In this case while SNR is proportional to total width,accuracy depends on subpulse width.

P4 coding is a pulse compression technique in which the phase of carrier isvaried in each subpulse.Our project aims at generation of high frequency P4 coded carrier in virtex 2 fpga.We have designed and implemented a system which can generate a maximum of 70 Mhz P4 coded carrier.We have made use of CORDIC algorithm for generating sample values(assuming a sinusoidal carrier).We have written the code in verilog.

Computer-Aided design of microwave amplifier (MATLAB 6.1)

Gurpreet Singh & Todkari Sangameshwar R. under guidance of Dr. S.Raghavan at NIT,Trichy.

An amplifier circuit has got an I/P & an O/P matching network consisting of L & C. For the network to provide maximum gain there should be perfect matching at the I/P & the O/P terminals. But generally this condition is not met, so students used I/P & O/P matching networks.

This project includes calculating 9 different gains, drawing stability circles, drawing constant-gain circles, constant-noise-figure circles, then designing I/P & O/P matching networks which includes finding values of inductance & capacitance . For all this, graphical method using Smith Chart has been used as the main tool. This method is much more efficient & user-friendly.

The project begins by introducing the S/W implementation of Smith Chart wherein given any impedance or reflection-coefficient value ( either in rectangular or in polar form) constant-r & constant-x circles can be drawn. Conversely also, given any point in the Smith Chart its impedance /reflection-coefficient value can be determined. In the project , the transistor from its S-parameters (as the other parameters such as hybrid etc. are not suitable at microwave frequencies) has been analyzed. Then comes the design the matching networks for different kinds of amplifier circuits e.g. Low-gain, High-gain, low-noise from the S-parameters, input & output reflection-coefficients. These matching networks include inductances & capacitances which are then realized using micro-strip lines