Sl. No.

Name of the project

Name of the funding agency

Sanctioned amount in Rs.

Period of execution

1

Telematics Laboratory

AICTE, New Delhi

11 lakhs

1995-97

2

Digital library

AICTE, New Delhi

8 lakhs

1998-2000

3

Setting up VLSI laboratory

MHRD, New Delhi

6 lakhs

2000-02

4

Design & Analysis of FPGA based wavepipelined structures for DSP applications

Ministry of Information Technology, New Delhi

25 lakhs

2001-2003

5

Design of FPGA based polyphase coded waveform generator

LRDE, Ministry of Defence, Bangalore

2.5 lakhs

2003-2004

6

SOC based target recognition system

DST, New Delhi

11.64 lakhs

2005-2007

7.

Optimization techniques for the FPGA implementation of software defined Radio

DST, New Delhi

19.2 lakhs

2006-2009

8.

Development of signal processing systems for core temperature measurement

IGCAR, Kalpakkam

15.0 lakhs

2009-2011

9.

Embedded system development using Intel atom 56XX processor

Intel, Bangalore

3.6 lakhs

2011-2012

10

Special Manpower Development programme for VLSI (SMDP-II)

Dept of Electronics & IT (Deity), New Delhi

109 Lakhs

2006-2011

11.

Design and implementation of Low power analog front end modules for wireless sensor networks

Deity, New Delhi

39 lakhs

2012-2015

12

Design & implementation of baseband modules for wireless sensor networks

Broadcomm Foundation, USA

Rs.3.2 lakhs

2015-2017

13.

C2SD/ SMDP-III

Deity, New Delhi

Rs.109 lakhs

2015 –2020

1

Design and Implementation of MB-OFDM UWB Transceiver Modules using Asynchronous Pipelining

Deity, New Delhi

33.5 lakhs

Feb. 2008 –Feb. 2011

2.

Low complexity Energy efficient Transceivers for Cognitive Radio System

UKEIRI

£40000

Feb 2012- Feb 2014

3.

Full Duplex and Cognitive Radio Architectures for Spectrally Efficient Communications (FD-CR-ASEC)

UKEIRI

£40000

2017-2020

4.

Setting up Wireless System Design lab.

FIST, DST

Rs.60 lakhs

2012 - 2017